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o p a 2 6 7 7 o pa 2677 dual, wideband, high output current operational amplifier opa2677 sbos126i C april 2000 C revised july 2008 www.ti.com copyright ? 2000-2008, texas instruments incorporated please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. features wideband +12v operation: 200mhz (g = +4) unity-gain stable: 220mhz (g = +1) high output current: 500ma output voltage swing: 5v high slew rate: 1800v/ s low supply current: 18ma flexible supply range: +5 to +12v single supply 2.5 to 6v dual supplies applications xdsl line driver cable modem driver matched i/q channel amplifier broadband video line driver arb line driver power line modem high cap load driver description the opa2677 provides the high output current and low distortion required in emerging xdsl and power line modem driver applications. operating on a single +12v supply, the opa2677 consumes a low 9ma/ch quiescent current to deliver a very high 500ma output current. this output current supports even the most demanding adsl cpe requirements with > 380ma mini- mum output current (+25 c minimum value) with low harmonic distortion. differential driver applications will deliver < C85dbc distortion at the peak upstream power levels of full rate adsl. the high 200mhz bandwidth will also support the most demand- ing vdsl line driver requirements. specified on 6v supplies (to support +12v operation), the opa2677 will also support a single +5v or dual 5v supply. video applications will benefit from its very high output current to drive up to 10 parallel video loads (15 ? ) with < 0.1%/0.1 dg/dp nonlinearity. the opa2677 is available in either an so-8 or qfn-16 and an hsop-8 powerpad ? package. opa2677 related products singles duals triples notes opa691 opa2691 opa3691 single +12v capable ths6042 15v capable opa2674 single +12v capable with current limit all trademarks are the property of their respective owners. single-supply adsl cpe driver 82.5 ? 2k ? 2k ? 1 f 17.4 ? 100 ? 2v pp afe output 324 ? 20 ? 324 ? 1/2 opa2677 1/2 opa2677 +12v 1:1.7 15v pp twisted pair 17.7v pp 20 ? 17.4 ? +6.0v production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. www.ti.com
opa2677 2 sbos126i www.ti.com specified package temperature package ordering transport product package-lead designator range marking number media, quantity opa2677 so-8 d C 40 c to +85 c opa2677u opa2677u rails, 100 " " " " " opa2677u/2k5 tape and reel, 2500 opa2677 hsop-8 dda C 40 c to +85 c op2677 opa2677idda rails, 75 " " " " " opa2677iddar tape and reel, 2500 opa2677 qfn-16 rgv C 40 c to +85 c opa2677 opa2677irgvt tape and reel, 250 opa2677irgvr tape and reel, 2500 absolute maximum ratings (1) power supply ............................................................................... 6.5v dc internal power dissipation .......................... see thermal characteristics differential input voltage .................................................................. 1.2v input common-mode voltage range ................................................. v s storage temperature range: u, dda, rgv ................. C 65 c to +125 c lead temperature (soldering, 10s) .............................................. +300 c junction temperature (t j ) ........................................................... +150 c esd rating: human body model (hbm) (2) ....................................................... 2000v charge device model (cdm) ....................................................... 1000v machine model (mm) ..................................................................... 100v notes: (1) stresses above these ratings may cause permanent damage. exposure to absolute maximum conditions for extended periods may degrade device reliability. (2) pins 2 and 6 on so-8 and hsop-8 packages, and pins 2 and 11 on qfn-16 package > 500v hbm. pin configurations top view electrostatic discharge sensitivity this integrated circuit can be damaged by esd. texas instru- ments recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. package/ordering information (1) note: (1) for the most current package and ordering information, see the package option addendum at the end of this document, o r see the ti web site at www.ti.com. 1 2 3 4 12 11 10 9 nc C in b +in b nc 16 15 14 13 out a nc +v s out b 5 67 8 nc nc C v s nc opa2677rgv qfn-16 nc C in a +in a nc 1 2 3 4 8 7 6 5 +v s out b C in b +in b opa2677u, dda so-8, hsop-8 out a C in a +in a C v s note: exposed thermal pad on hsop-8 and qfn-16 must be tied to C v s .
opa2677 3 sbos126i www.ti.com opa2677u, dda, rgv typ 0 c to C 40 c to min/ test parameter conditions +25 c +25 c (1) 70 c (2) +85 c (2) units max level (3) ac performance (see figure 1) small-signal bandwidth (v o = 0.5v pp ) g = +1, r f = 511 ? 220 mhz min b g = +2, r f = 475 ? 200 170 168 165 mhz min b g = +4, r f = 402 ? 200 170 168 165 mhz min b g = +8, r f = 250 ? 250 225 205 200 mhz min b peaking at a gain of +1 g = +1, r f = 511 ? 0 db typ c bandwidth for 0.1db gain flatness g = +4, v o = 0.5v pp 80 36 32 30 mhz min b large-signal bandwidth g = +4, v o = 5v pp 200 mhz typ c slew rate g = +4, 5v step 2000 1500 1450 1400 v/ sminb rise-and-fall time g = +4, v o = 2v step 1.75 ns typ c harmonic distortion g = +4, f = 5mhz, v o = 2v pp 2nd-harmonic r l = 100 ? C 72 C 70 C 69 C 68 dbc max b r l 500 ? C 82 C 80 C 79 C 78 dbc max b 3rd-harmonic r l = 100 ? C 81 C 80 C 79 C 78 dbc max b r l 500 ? C 93 C 91 C 90 C 89 dbc max b input voltage noise f > 1mhz 2 2.6 2.9 3.1 nv/ hz max b noninverting input current noise f > 1mhz 16 20 21 22 pa/ hz max b inverting input current noise f > 1mhz 24 29 30 31 pa/ hz max b ntsc differential gain ntsc, g = +2, r l = 150 ? 0.03 % typ c ntsc, g = +2, r l = 37.5 ? 0.05 % typ c ntsc differential phase ntsc, g = +2, r l = 150 ? 0.01 degrees typ c ntsc, g = +2, r l = 37.5 ? 0.04 degrees typ c channel-to-channel crosstalk f = 5mhz, input referred C 92 db typ c dc performance (4) open-loop transimpedance gain v o = 0v, r l = 100 ? 135 80 76 75 k ? min a input offset voltage v cm = 0v 1.0 4.5 5 5.3 mv max a average offset voltage drift v cm = 0v 4 10 10 12 v/ cmax b noninverting input bias current v cm = 0v 10 30 32 35 amaxa average noninverting input bias current drift v cm = 0v 5 50 50 75 na/ cmax b inverting input bias current v cm = 0v 10 35 40 45 amaxa average inverting input bias current drift v cm = 0v 10 100 100 150 na /c max b input (4) common-mode input range (cmir) (5) 4.5 4.1 4.0 3.9 v min a common-mode rejection ratio (cmrr) v cm = 0v, input referred 55 51 50 49 db min a noninverting input impedance 250 || 2 k ? || pf typ c minimum inverting input resistance open-loop 22 12 ? min b maximum inverting input resistance open-loop 22 35 ? max b output (4) voltage output swing no load 5.1 4.9 4.8 4.7 v min a r l = 100 ? 5.0 4.8 4.7 4.5 v min a r l = 25 ? 4.8 v typ c current output v o = 0 500 380 350 320 ma min a peak current output, sourcing (6) v o = 0 1.2 a typ c peak current output, sinking (6) v o = 0 C 1.6 a typ c closed-loop output impedance g = +4, f 100khz 0.003 ? typ c power supply specified operating voltage 6 v typ c maximum operating voltage 6.3 6.3 6.3 v max a minimum operating voltage 2 v typ c maximum quiescent current v s = 6v, both channels 18 18.6 18.8 19.5 ma max a minimum quiescent current v s = 6v, both channels 18 17.4 16.5 16.0 ma min a power-supply rejection ratio (psrr) f = 100khz, input referred 56 51 49 48 db min a thermal characteristics specification: u, dda, rgv C 40 to +85 c thermal resistance, ja junction-to-ambient uso-8 125 c/w typ c dda hsop-8 exposed slug soldered to board 55 c/w typ c rgv qfn-16 exposed slug soldered to board 50 (7) c/w typ c min/max over temperature electrical characteristics: v s = 6v boldface limits are tested at +25 c. at t a = +25 c, g = +4, r f = 402 ? , and r l = 100 ? , unless otherwise noted. see figure 1 for ac performance only. notes: (1) junction temperature = ambient for +25 c specifications. (2) junction temperature = ambient at low temperature limit; junction temperature = ambient +23 c at high temperature limit for over temperature specifications. (3) test levels: (a) 100% tested at +25 c. over temperature limits by characterization and simulation. (b) limits set by characterization and simulation. (c) typical value only for information. (4) current is considered positive out of node. v cm is the input common-mode voltage. (5) tested < 3db below minimum cmrr specifications at cmir limits. (6) peak output duration should not exceed junction temperature +150 c for extended periods. (7) not connecting the exposed slug to the C v j plane gives 75 c/w thermal impedance ( ja ).
opa2677 4 sbos126i www.ti.com ac performance (see figure 3) small-signal bandwidth (v o = 0.5v pp ) g = +1, r f = 536 ? 160 mhz min b g = +2, r f = 511 ? 150 120 118 115 mhz min b g = +4, r f = 453 ? 150 130 128 125 mhz min b g = +8, r f = 332 ? 160 130 128 125 mhz min b peaking at a gain of +1 g = +1, r f = 511 ? 0 db typ c bandwidth for 0.1db gain flatness g = +4, v o = 0.5v pp 70 23 20 19 mhz min b large-signal bandwidth g = +4, v o = 2v pp 100 mhz typ c slew rate g = +4, 2v step 1100 830 827 825 v/ sminb rise-and-fall time g = +4, v o = 2v step 2 ns typ c harmonic distortion g = +4, f = 5mhz, v o = 2v pp 2nd-harmonic r l = 100 ? C 67 C 65 C 64 C 63 dbc max b r l 500 ? C 71 C 68 C 67 C 66 dbc max b 3rd-harmonic r l = 100 ? C 72 C 70 C 69 C 68 dbc max b r l 500 ? C 74 C 71 C 70 C 69 dbc max b input voltage noise f > 1mhz 2 2.6 2.9 3.1 nv/ hz max b noninverting input current noise f > 1mhz 16 20 21 22 pa/ hz max b inverting input current noise f > 1mhz 24 29 30 31 pa/ hz max b channel-to-channel crosstalk f = 5mhz, input referred C 92 db typ c dc performance open-loop transimpedance gain v o = 0v, r l = 100 ? 110 72 70 68 k ? min a input offset voltage v cm = 0v 0.8 3.5 4.0 4.3 mv max a average offset voltage drift v cm = 0v 4 10 10 12 v/ cmax b noninverting input bias current v cm = 0v 10 30 32 35 amaxa average noninverting input bias current drift v cm = 0v 5 50 50 75 na/ cmax b inverting input bias current v cm = 0v 10 30 40 45 amaxa average inverting input bias current drift v cm = 0v 10 100 100 150 na /c max b input most positive input voltage 3.7 3.3 3.2 3.1 v min a most negative input voltage 1.3 1.7 1.8 1.9 v min a common-mode rejection ratio (cmrr) v cm = 2.5v, input referred 52 49 48 47 db min a noninverting input impedance 250 || 2 k ? || pf typ c minimum inverting input resistance open-loop 25 15 k ? min b maximum inverting input resistance open-loop 25 40 k ? max b output most positive output voltage no load 4.1 3.9 3.8 3.6 v min a r l = 100 ? 3.5 3.8 3.7 3.5 v min a least positive output voltage no load 0.8 1.0 1.1 1.3 v min a r l = 100 ? 1.0 1.1 1.2 1.5 v min a current output v o = 0 300 200 180 100 ma min a closed-loop output impedance g = +4, f 100khz 0.02 ? typ c power supply specified operating voltage +5 v typ c maximum operating voltage 12.6 12.6 12.6 v max a minimum operating voltage +4 v typ c maximum quiescent current v s = 5v, both channels 13.6 14.8 15.2 15.6 ma max a minimum quiescent current v s = 5v, both channels 13.6 12.0 11.7 11.4 ma min a power-supply rejection ratio (psrr) f = 100khz, input referred 52 db typ c thermal characteristics specification: u, dda, rgv C 40 to +85 c thermal resistance, ja junction-to-ambient uso-8 125 c/w typ c dda hsop-8 exposed slug soldered to board 55 c/w typ c rgv qfn-16 exposed slug soldered to board 50 (4) c/w typ c opa2677u, dda, rgv typ 0 c to C 40 c to min/ test parameter conditions +25 c +25 c (1) 70 c (2) +85 c (2) units max level (3) electrical specifications: v s = +5v boldface limits are tested at +25 c. at t a = +25 c, g = +4, r f = 453 ? , and r l = 100 ? , unless otherwise noted. see figure 3 for ac performance only. min/max over temperature notes: (1) junction temperature = ambient for +25 c specifications. (2) junction temperature = ambient at low temperature limit; junction temperature = ambient +9 c at high temperature limit for over temperature specifications. (3) test levels: (a) 100% tested at +25 c. over temperature limits by characterization and simulation. (b) limits set by characterization and simulation. (c) typical value only for information. (4) not connecting the exposed slug to the C v j plane gives 75 c/w thermal impedance ( ja ).
opa2677 5 sbos126i www.ti.com typical characteristics: v s = 6v at t a = +25 c, g = +4, r f = 402 ? , and r l = 100 ? , unless otherwise noted. noninverting small-signal frequency response frequency (mhz) 0 100 200 300 400 500 6 3 0 C 3 C 6 C 9 C 12 C 15 C 18 normalized gain (db) v o = 0.5v pp see figure 1 g = +8 r f = 250 ? g = +2 r f = 475 ? g = +4 r f = 402 ? g = +1 r f = 511 ? inverting small-signal frequency response frequency (mhz) 0 100 200 300 400 500 6 3 0 C 3 C 6 C 9 C 12 C 15 C 18 normalized gain (db) v o = 0.5v pp g = C 1, r f = 475 ? g = C 2, r f = 422 ? g = C 8, r f = 280 ? g = C 4, r f = 383 ? see figure 2 noninverting large-signal frequency response frequency (mhz) 0 100 200 300 400 500 18 15 12 9 6 3 0 C 3 C 6 C 9 C 12 C 15 gain (db) g = +4, see figure 1 v o = 10v pp v o = 8v pp v o = 2v pp v o 1v pp see figure 1 inverting large-signal frequency response frequency (mhz) 0 100 200 300 400 500 18 15 12 9 6 3 0 C 3 C 6 C 9 C 12 C 15 gain (db) g = C 4 r f = 383 ? v o = 8v pp v o = 10v pp v o = 5v pp v o 1v pp see figure 2 noninverting pulse response time (5ns/div) output voltage (1v/div) output voltage (100mv/div) 4v pp g = +4 200mv pp left scale large signal right scale small signal see figure 1 inverting pulse response time (5ns/div) output voltage (1v/div) output voltage (100mv/div) 4v pp left scale large signal right scale g = C 4 200mv pp small signal see figure 2
opa2677 6 sbos126i www.ti.com typical characteristics: v s = 6v (cont.) at t a = +25 c, g = +4, r f = 402 ? , and r l = 100 ? , unless otherwise noted. harmonic distortion vs frequency frequency (mhz) 0.1 1 20 10 C 60 C 65 C 70 C 75 C 80 C 85 C 90 C 95 C 100 harmonic distortion (dbc) v o = 2v pp r l = 100 ? single channel see figure 1 2nd-harmonic 3rd-harmonic harmonic distortion vs output voltage output voltage (v pp ) 0.1 1 10 C 60 C 65 C 70 C 75 C 80 C 85 C 90 C 95 C 100 harmonic distortion (dbc) f = 5mhz r l = 100 ? 2nd-harmonic 3rd-harmonic single channel see figure 1 harmonic distortion vs noninverting gain gain magnitude (v/v) 1 C 60 C 65 C 70 C 75 C 80 C 85 C 90 C 95 C 100 10 harmonic distortion (dbc) v o = 2v pp f = 5mhz r l = 100 ? 2nd-harmonic 3rd-harmonic single channel see figure 1 harmonic distortion vs load resistance load resistance ( ? ) 10 100 1000 C 60 C 65 C 70 C 75 C 80 C 85 C 90 C 95 C 100 harmonic distortion (dbc) single channel see figure 1 v o = 2v pp f = 5mhz 2nd-harmonic 3rd-harmonic 2-tone, 3rd-order intermodulation spurious single-tone load power (dbm) C 10 0 5 C 510 C 60 C 65 C 70 C 75 C 80 C 85 C 90 C 95 C 100 3rd-order spurious level (dbc) see figure 1 20mhz 5mhz 1mhz single channel see figure 1 10mhz harmonic distortion vs inverting gain gain magnitude | (v/v) | 1 C 60 C 65 C 70 C 75 C 80 C 85 C 90 C 95 C 100 10 harmonic distortion (dbc) v o = 2v pp f = 5mhz r l = 100 ? 2nd-harmonic 3rd-harmonic single channel see figure 2
opa2677 7 sbos126i www.ti.com typical characteristics: v s = 6v (cont.) at t a = +25 c, g = +4, r f = 402 ? , and r l = 100 ? , unless otherwise noted. maximum output swing vs load resistance load resistance ( ? ) 10 6 5 4 3 2 1 0 C 1 C 2 C 3 C 4 C 5 C 6 100 1000 output voltage (v) see figure 1 output voltage and current limitations i o (ma) C 600 6 5 4 3 2 1 0 C 1 C 2 C 3 C 4 C 5 C 6 0 200 400 C 200 C 400 600 v o (v) r l = 10 ? r l = 25 ? r l = 50 ? r l = 100 ? 1w internal power single ch 1w internal power single ch input voltage and current noise density frequency (hz) 100 100 10 1 100k 1m 10k 1k 10m voltage noise nv/ hz current noise pa/ hz inverting current noise 24pa/ hz 16pa/ hz 2nv/ hz voltage noise noninverting current noise channel-to-channel crosstalk frequency (hz) 1m 10m 100m C 60 C 65 C 70 C 75 C 80 C 85 C 90 C 95 C 100 crosstalk, input referred (db) input referred recommended r s vs capacitive load capacitive load (pf) 1 10 100 1000 90 80 70 60 50 40 30 20 10 0 r s ( ? ) frequency response vs capacitive load frequency (hz) 1m 2 0 C 2 C 4 C 6 C 8 C 10 10m 100m 1g normalized gain to capacitive load (db) c l = 10pf c l = 22pf c l = 100pf c l = 47pf 1/2 opa2677 402 ? r s 133 ? 1k ? c l 1k ? is optional.
opa2677 8 sbos126i www.ti.com typical characteristics: v s = 6v (cont.) at t a = +25 c, g = +4, r f = 402 ? , and r l = 100 ? , unless otherwise noted. cmrr and psrr vs frequency frequency (hz) 1k 70 60 50 40 30 20 10 0 10k 100k 1m 10m 100m power-supply rejection ratio (db) common-mode rejection ratio (db) cmrr C psrr +psrr open-loop transimpedance gain and phase frequency (hz) 10k 100k 1m 10m 100m 1g 120 100 80 60 40 20 0 transimpedance gain (20db ? /div) 0 C 45 C 90 C 135 C 180 C 225 C 270 transimpedance phase (45 /div) closed-loop output impedance vs frequency frequency (hz) 10k 100k 1m 10m 100m 1g 100 10 1 0.1 0.01 0.001 output impedance magnitude ( ? ) composite video dg/d number of 150 ? loads 12345678910 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 dg/d (%/ ) g = +2 r f = 475 ? v s = 5v d , negative video d , positive video dg, positive video dg, negative video 8 6 4 2 0 C 2 C 4 C 6 C 8 noninverting overdrive recovery time (20ns/div) output voltage (2v/div) 4 3 2 1 0 C 1 C 2 C 3 C 4 input voltage (1v/div) g = +4 r l = 100 ? see figure 1 input output 8 6 4 2 0 C 2 C 4 C 6 C 8 inverting overdrive recovery time (20ns/div) output voltage (2v/div) 4 3 2 1 0 C 1 C 2 C 3 C 4 input voltage (1v/div) input output see figure 2 g = C 4 r l = 100 ?
opa2677 9 sbos126i www.ti.com typical characteristics: v s = 6v (cont.) at t a = +25 c, g = +4, r f = 402 ? , and r l = 100 ? , unless otherwise noted. typical dc error drift vs temperature ambient temperature ( c) C 55 10 8 6 4 2 0 C 2 C 4 C 6 C 8 C 10 C 35 C 15 5 25 45 65 85 105 125 input offset voltage (mv) input bias current ( a) noninverting bias current input offset voltage inverting bias current supply and output current vs temperature temperature ( c) C 55 600 550 500 450 400 350 300 250 200 150 100 C 35 C 15 5 25 45 65 85 105 125 output current (ma) 50 40 30 20 10 0 output current (ma) sourcing output current sinking output current supply current cmir and output voltage vs supply voltage supply voltage ( v) 23 45 6 5 4 3 2 1 0 6 voltage range ( v) output voltage no load +v input voltage C v input voltage
opa2677 10 sbos126i www.ti.com typical characteristics: v s = 6v (cont.) at t a = +25 c, differential gain = +9, r f = 300 ? , and r l = 70 ? , unless otherwise noted. see figure 5 for ac performance only. differential small-signal frequency response frequency (mhz) 5 100 10 500 3 0 C 3 C 6 C 9 normalized gain (dbc) r l = 70 ? v o = 200mv pp g d = +2, r f = 442 ? g d = +5, r f = 383 ? g d = +9, r f = 300 ? see figure 5 differential large-signal frequency response frequency (mhz) 4100 10 400 20 19 18 17 16 15 14 gain (db) 0.2v pp r l = 70 ? g d = +9 5v pp 2v pp 1v pp see figure 5 harmonic distortion vs load resistance load resistance ( ? ) 10 1k 100 C 65 C 70 C 75 C 80 C 85 C 90 C 95 harmonic distortion (db) 2nd-harmonic 3rd-harmonic f = 5mhz g d = +9 v o = 2v pp see figure 5 harmonic distortion vs frequency frequency (mhz) 0.1 10 1 100 C 60 C 65 C 70 C 75 C 80 C 85 C 90 C 95 C 100 harmonic distortion (db) 2nd-harmonic 3rd-harmonic g d = +9 r l = 70 ? v o = 2v pp see figure 5 harmonic distortion vs output voltage output voltage (vp-p) 0.1 10 1 100 C 64 C 66 C 68 C 70 C 72 C 74 C 76 C 78 C 80 harmonic distortion (db) f = 5mhz g = +9 r l = 70 ? 2nd-harmonic 3rd-harmonic see figure 5 multitone power ratio (v s = 6v, 13dbm output power) frequency (khz) 0 20 40 60 80 100 120 140 160 10 0 C 10 C 20 C 30 C 40 C 50 C 60 C 70 C 80 power (db) see figure 5
opa2677 11 sbos126i www.ti.com typical characteristics: v s = +5v at t a = +25 c, g = +4, r f = 453 ? , and r l = 100 ? to v s /2, unless otherwise noted. noninverting small-signal frequency response frequency (mhz) 0 50 100 150 200 250 6 3 0 C 3 C 6 C 9 C 12 C 15 C 18 normalized gain (db) see figure 3 g = +1 r f = 536 ? g = +2 r f = 511 ? g = +4 r f = 453 ? g = +8 r f = 332 ? inverting small-signal frequency response frequency (mhz) 0 50 100 150 200 250 6 3 0 C 3 C 6 C 9 C 12 C 15 C 18 normalized gain (db) g = C 8 r f = 332 ? g = C 4 r f = 453 ? g = C 2 r f = 511 ? g = C 1 r f = 536 ? see figure 4 400 300 200 100 0 C 100 C 200 C 300 C 400 small-signal pulse response time (5ns/div) output voltage (100mv/div) v o = 500mv pp see figure 3 1.6 1.2 0.8 0.4 0 C 0.4 C 0.8 C 1.2 C 1.6 large-signal pulse response time (5ns/div) output voltage (400mv/div) v o = 2v pp see figure 3 recommended r s vs capacitive load capacitive load (pf) 1 10 100 1000 50 45 40 35 30 25 20 15 10 5 0 r s ( ? ) frequency response vs capacitive load frequency (hz) 1m 2 0 C 2 C 4 C 6 C 8 C 10 10m 100m 1g normalized gain to capacitive load (db) c l = 10pf c l = 22pf c l = 47pf 453 ? 150 ? 804 ? 804 ? 1k ? 1k ? load optional. 1/2 opa2677 v i +5v 0.1 f v o r s c l 0.1 f c l = 100pf
opa2677 12 sbos126i www.ti.com typical characteristics: v s = +5v (cont.) at t a = +25 c, g = +4, r f = 453 ? , and r l = 100 ? to v s /2, unless otherwise noted. harmonic distortion vs frequency frequency (mhz) 0.1 1 20 10 C 50 C 55 C 60 C 65 C 70 C 75 C 80 C 85 C 90 harmonic distortion (dbc) v o = 2v pp r l = 100 ? to v s /2 single channel see figure 3 2nd-harmonic 3rd-harmonic harmonic distortion vs noninverting gain gain magnitude (v/v) 1 C 50 C 55 C 60 C 65 C 70 C 75 C 80 C 85 C 90 10 harmonic distortion (dbc) 2nd-harmonic 3rd-harmonic v o = 2v pp f = 5mhz r l = 100 ? to v s /2 single channel see figure 3 harmonic distortion vs output voltage output voltage (v pp ) 0.1 1 2 C 50 C 55 C 60 C 65 C 70 C 75 C 80 C 85 C 90 harmonic distortion (dbc) f = 5mhz r l = 100 ? to v s /2 single channel see figure 3 3rd-harmonic 2nd-harmonic harmonic distortion vs inverting gain gain (v/v) C 1 C 50 C 55 C 60 C 65 C 70 C 75 C 80 C 85 C 90 C 10 harmonic distortion (dbc) 2nd-harmonic 3rd-harmonic v o = 2v pp f = 5mhz r l = 100 ? to v s /2 single channel see figure 4 2-tone, 3rd-order spurious level single-tone load power (dbm) C 10 0 5 C 510 C 50 C 55 C 60 C 65 C 70 C 75 C 80 C 85 C 90 3rd-order spurious level (dbc) 20mhz 5mhz 1mhz single channel see figure 3 10mhz harmonic distortion vs load resistance load resistance ( ? ) 10 100 1000 C 50 C 55 C 60 C 65 C 70 C 75 C 80 C 85 C 90 harmonic distortion (dbc) single channel see figure 3 v o = 2v pp f = 5mhz 2nd-harmonic 3rd-harmonic
opa2677 13 sbos126i www.ti.com typical characteristics: v s = +5v (cont.) at t a = +25 c, differential gain = +9, r f = 316 ? , and r l = 70 ? , unless otherwise noted. r l r g c g v o v i g d = 1 + 2 ? r f r g r f 300 ? r f 300 ? 1/2 opa2677 1/2 opa2677 = v o v i differential small-signal frequency response frequency (mhz) 10 100 200 3 0 C 3 C 6 C 9 C 12 normalized gain (db) r l = 70 ? g d = +2 r f = 511 ? g d = +5 r f = 422 ? g d = +9 r f = 316 ? differential large-signal frequency response frequency (mhz) 10 100 20 19 18 17 16 15 14 gain (db) r l = 70 ? g d = +9 0.2v pp 1v pp 2v pp 5v pp harmonic distortion vs frequency frequency (mhz) 0.1 10 1 100 C 60 C 65 C 70 C 75 C 80 C 85 harmonic distortion (dbc) 3rd-harmonic 2nd-harmonic g d = +9 r l = 70 ? v o = 2v pp harmonic distortion vs load resistance load resistance ( ? ) 10 1k 100 C 65 C 70 C 75 C 80 C 85 C 90 C 95 harmonic distortion (dbc) 2nd-harmonic 3rd-harmonic g d = +9 f = 5mhz v o = 2v pp harmonic distortion vs output voltage differential output voltage (v pp ) 0.1 10 1 C 65 C 70 C 75 C 80 C 85 harmonic distortion (db) f = 5mhz g = +9 r l = 70 ? 3rd-harmonic 2nd-harmonic differential performance test circuit
opa2677 14 sbos126i www.ti.com application information wideband current-feedback operation the opa2677 gives the exceptional ac performance of a wideband current-feedback op amp with a highly linear, high- power output stage. requiring only 9ma/ch quiescent cur- rent, the opa2677 swings to within 1v of either supply rail and delivers in excess of 380ma at room temperature. this low-output headroom requirement, along with supply voltage independent biasing, gives remarkable single (+5v) supply operation. the opa2677 delivers greater than 150mhz band- width driving a 2v pp output into 100 ? on a single +5v supply. previous boosted output stage amplifiers typically suffer from very poor crossover distortion as the output current goes through zero. the opa2677 achieves a comparable power gain with much better linearity. the primary advantage of a current-feedback op amp over a voltage-feedback op amp is that ac performance (bandwidth and distortion) is relatively independent of signal gain. figure 1 shows the dc-coupled, gain of +4, dual power-supply circuit configuration used as the basis of the 6v electrical and typical characteristics. for test purposes, the input impedance is set to 50 ? with a resistor to ground and the output impedance is set to 50 ? with a series output resistor. voltage swings reported in the electrical characteristics are taken directly at the input and output pins, whereas load powers (dbm) are defined at a matched 50 ? load. for the circuit of figure 1, the total effective load is 100 ? || 535 ? = 84 ? . figure 2 shows the dc-coupled, bipolar supply circuit con- figuration used as the basis for the inverting gain 6v typical characteristics. key design considerations of the inverting configuration are developed in the inverting ampli- fier operation section. figure 3 shows the ac-coupled, gain of +4, single-supply circuit configuration used as the basis of the +5v electrical and typical characteristics. though not a rail-to-rail design, the opa2677 requires minimal input and output voltage headroom compared to other very wideband current-feed- back op amps. it will deliver a 3v pp output swing on a single +5v supply with greater than 100mhz bandwidth. the key requirement of broadband single-supply operation is to main- tain input and output signal swings within the usable voltage ranges at both the input and the output. the circuit of figure 3 establishes an input midpoint bias using a simple resistive divider from the +5v supply (two 806 ? resistors). the input signal is then ac-coupled into this midpoint voltage bias. the input voltage can swing to within 1.3v of either supply pin, giving a 2.4v pp input signal range centered between the supply pins. the input impedance matching resistor (57.6 ? ) used for testing is adjusted to give a 50 ? input match when the parallel combination of the biasing divider network is included. the gain resistor (r g ) is ac-coupled, giving the circuit a dc gain of +1 which puts the input dc bias voltage (2.5v) on the output as well. the feedback resistor value is adjusted from the bipolar supply condition to re-optimize for a flat frequency response in +5v, gain of +4, operation. again, on a single +5v supply, the output voltage can swing to within 1v of either supply pin while delivering more than 200ma output current. a demanding 100 ? load to a midpoint bias is used in this characterization circuit. the new output stage used in the opa2677 can deliver large bipolar output currents into this midpoint load with minimal crossover distor- tion, as shown by the +5v supply, harmonic distortion plots. 1/2 opa2677 +6v + C 6v 50 ? load 50 ? 50 ? v o v i 50 ? source r g 133 ? r f 402 ? + 6.8 f 0.1 f 6.8 f 0.1 f +v s C v s 1/2 opa2677 +5v C 5v 50 ? load 50 ? v o v i 50 ? source r m 100 ? r f 402 ? r f 402 ? power-supply decoupling not shown. figure 1. dc-coupled, g = +4, bipolar supply, specifica- tion and test circuit. figure 2. dc-coupled, g = C 4, bipolar supply, specifica- tion and test circuit.
opa2677 15 sbos126i www.ti.com the last configuration used as the basis of the +5v electrical and typical characteristics is shown in figure 4. design considerations for this inverting, bipolar supply configuration are covered either in single-supply configuration (as shown in figure 3) or in the inverting amplifier operation section. where the input is brought into the opa2677. each has its advantages and disadvantages. figure 5 shows a basic starting point for noninverting differential i/o applications. differential interface applications dual op amps are particularly suitable to differential input to differential output applications. typically, these fall into either analog-to-digital converter (adc) input interface or line driver applications. two basic approaches to differential i/o are noninverting or inverting configurations. since the output is differential, the signal polarity is somewhat meaningless the noninverting and inverting terminology applies here to 1/2 opa2677 +5v v s /2 806 ? v i 100 ? v o 806 ? r f 453 ? r m 88.7 ? 6.8 f + 0.1 f 0.1 f r g 113 ? this approach provides for a source termination impedance that is independent of the signal gain. for instance, simple differential filters may be included in the signal path right up to the noninverting inputs without interacting with the gain setting. the differential signal gain for the circuit of figure 5 is: a d = 1 + 2 ? r f /r g since the opa2677 is a current feedback (cfb) amplifier, its bandwidth is principally controlled with the feedback resistor value; figure 5 shows a value of 300 ? for the a d = +9 design. the differential gain, however, may be adjusted with considerable freedom using just the r g resistor. in fact, r g may be a reactive network providing a very isolated shaping to the differential frequency response. various combinations of single-supply or ac-coupled gain can also be delivered using the basic circuit of figure 5. common-mode bias voltages on the two noninverting inputs pass on to the output with a gain of 1 since an equal dc voltage at each inverting node creates no current through r g . this circuit does show a common-mode gain of 1 from input to output. the source connection should either remove this common-mode signal if undesired (using an input trans- former can provide this function), or the common-mode voltage at the inputs can be used to set the output common- mode bias. if the low common-mode rejection of this circuit is a problem, the output interface may also be used to reject that common-mode. for instance, most modern differential input adcs reject common-mode signals very well, while a line driver application through a transformer will also attenu- ate the common-mode signal through to the line. r l r f 300 ? r f 300 ? C 6 +6 1/2 opa2677 1/2 opa2677 r g 75 ? c g v o v i g d = 1 + = 2 ? r f r g v o v i figure 3. ac-coupled, g = +4, single-supply, specifica- tion and test circuit. figure 4. ac-coupled, g = C 4, single-supply, specifica- tion and test circuit. figure 5. noninverting differential i/o amplifier. 1/2 opa2677 +5v +v s v s /2 806 ? 100 ? v o v i 57.6 ? 806 ? r f 453 ? r g 150 ? 0.1 f 0.1 f 6.8 f + 0.1 f
opa2677 16 sbos126i www.ti.com single-supply adsl upstream driver figure 6 shows an example of a single-supply adsl up- stream driver. the dual opa2677 is configured as a differen- tial gain stage to provide signal drive to the primary winding of the transformer (here, a step-up transformer with a turns ratio of 1:1.7). the main advantage of this configuration is the cancellation of all even harmonic distortion products. another important advantage for adsl is that each amplifier needs only to swing half of the total output required driving the load. opa2677 hdsl2 upstream driver figure 7 shows an hdsl2 implementation of a single-supply upstream driver. the two designs differ by the values of their matching impedance, the load impedance, and the ratio turns of the transformers. all these differences are reflected in the higher peak current and thus, the higher maximum power dissipa- tion in the output of the driver. the analog front end (afe) signal is ac-coupled to the driver, and the noninverting input of each amplifier is biased to the mid-supply voltage (+6v in this case). in addition to providing the proper biasing to the amplifier, this approach also provides a high-pass filtering with a corner frequency, set here at 5khz. as the upstream signal bandwidth starts at 26khz, this high-pass filter does not generate any problem and has the advantage of filtering out unwanted lower fre- quencies. the input signal is amplified with a gain set by the following equation: g r r d f g =+ ? 1 2 (1) with r f = 324 ? and r g = 82.5 ? , the gain for this differential amplifier is 8.85. this gain boosts the afe signal, assumed to be a maximum of 2v pp , to a maximum of 17.3v pp . refer to the setting resistor values to optimize bandwidth section for a discussion on which feedback resistor value to choose. the two back-termination resistors (17.4 ? each) added at each terminal of the transformer make the impedance of the modem match the impedance of the phone line, and also provide a means of detecting the received signal for the receiver. the value of these resistors (r m ) is a function of the line impedance and the transformer turns ratio (n), given by the following equation: r z m line n = 2 2 (2) r g 82.5 ? 2k ? 2k ? 1 f 0.1 f 0.1 f r m 17.4 ? 100 ? z line afe 2v pp max assumed r f 324 ? 20 ? 20 ? 324 ? r f 1/2 opa2677 1/2 opa2677 +12v 1:1.7 17.7v pp i p = 128ma i p = 128ma r m 17.4 ? +6v 82.5 ? 2k ? 2k ? 1 f 0.1 f 0.1 f r m 11.5 ? 135 ? z line afe 2v pp max assumed 324 ? 20 ? 20 ? 324 ? 1/2 opa2677 1/2 opa2677 +12v 1:2.4 17.3v pp i p = 185ma i p = 185ma r m 11.5 ? +6v line driver headroom model the first step in a transformer-coupled, twisted-pair driver design is to compute the peak-to-peak output voltage from the target specifications. this is done using the following equations: p v mw r l rms l =? ( ) ? 10 1 2 log (3) with p l power at the load, v rms voltage at the load, and r l load impedance; this gives the following: vmwr rms l p l = ( ) ?? 110 10 (4) v crest factor v c v p rms f rms == ?? (5) with v p peak voltage at the load and cf crest factor. v lpp = 2 ? cf ? v rms (6) with v lpp : peak-to-peak voltage at the load. consolidating equations 3 through 6 allows expressing the required peak-to-peak voltage at the load as a function of the crest factor, the load impedance, and the power at the load. thus, vcfmwr lpp l p l =? ? ( ) ?? 21 10 10 (7) this v lpp is usually computed for a nominal line impedance and may be taken as a fixed design target. the next step in the design is to compute the individual amplifier output voltage and currents as a function of v pp on figure 6. single-supply adsl upstream driver. figure 7. hdsl2 upstream driver.
opa2677 17 sbos126i www.ti.com the line and transformer turns ratio. as this turns ratio changes, the minimum allowed supply voltage changes along with it. the peak current in the amplifier output is given by: = ? ? ? i v nr p lpp m 1 2 2 1 4 (8) with v pp as defined in equation 7, and r m as defined in equation 2 and shown in figure 8. total driver power for xdsl applications the total internal power dissipation for the opa2677 in an xdsl line driver application will be the sum of the quiescent power and the output stage power. the opa2677 holds a relatively constant quiescent current versus supply voltage giving a power contribution that is simply the quiescent current times the supply voltage used (the supply voltage will be greater than the solution given in equation 10). the total output stage power may be computed with reference to figure 10. with the previous information available, it is now possible to select a supply voltage and the turns ratio desired for the transformer as well as calculate the headroom for the opa2677. the model, shown in figure 9, can be described with the following set of equations: 1) as available output swing: v pp = v cc C (v 1 + v 2 ) C i p ? (r 1 + r 2 ) (9) 2) or as required supply voltage: v cc = v pp + (v 1 + v 2 ) + i p ? (r 1 + r 2 ) (10) the minimum supply voltage for a power and load require- ment is given by equation 10. r m r m v lpp n v lpp r l 2v lpp n v pp = v o r 1 v 1 +v cc r 2 v 2 i p figure 8. driver peak output voltage. figure 9. line driver headroom model. v 1 r 1 v 2 r 2 +5v 0.9v 5 ? 0.8v 5 ? +12v 0.9v 2 ? 0.9v 2 ? table i. line driver headroom model values. v 1 , v 2 , r 1 , and r 2 are given in table i for both +12v and +5v operation. figure 10. output stage power model. the two output stages used to drive the load of figure 8 can be seen as an h-bridge in figure 10. the average current drawn from the supply into this h-bridge and load will be the peak current in the load given by equation 8 divided by the crest factor (cf) for the xdsl modulation. this total power from the supply is then reduced by the power in r t to leave the power dissipated internal to the drivers in the four output stage transistors. that power is simply the target line power used in equation 3 plus the power lost in the matching elements (r m ). in the examples here, a perfect match is targeted giving the same power in the matching elements as in the load. the output stage power is then set by equation 11. p i cf vp out p cc l = C 2 (11) the total amplifier power is then: piv i cf vp tot q cc p cc l = + C 2 (12) for the adsl cpe upstream driver design of figure 6, the peak current is 128ma for a signal that requires a crest factor of 5.33 with a target line power of 13dbm into 100 ? (20mw). with a typical quiescent current of 18ma and a nominal supply voltage of +12v, the total internal power dissipation for the solution of figure 6 will be: (13) pmav ma vmwmw tot = ( ) + ( ) ( ) = 18 12 128 533 12 2 20 464 . C r t +v cc i avg = i p cf
opa2677 18 sbos126i www.ti.com design-in tools demonstration fixtures a printed circuit board (pcb) is available to assist in the initial evaluation of circuit performance using the opa2677. the fixture is offered free of charge as unpopulated pcb, deliv- ered with a user s guide. the summary information for this fixture is shown in table ii. the buffer gain is typically very close to 1.00 and is normally neglected from signal gain considerations. it sets the cmrr, however, for a single op amp differential amplifier configura- tion. for a buffer gain < 1.0, the cmrr = C 20 ? log (1 C )db. r i , the buffer output impedance, is a critical portion of the bandwidth control equation. the opa2677 inverting input resistor is typically 22 ? . a current-feedback op amp senses an error current in the inverting node (as opposed to a differential input error volt- age for a voltage-feedback op amp) and passes this on to the output through an internal frequency dependent transimped- ance gain. the typical characteristics show this open-loop transimpedance response, which is analogous to the open- loop voltage gain curve for a voltage-feedback op amp. developing the transfer function for the circuit of figure 11 gives equation 14: v v r r rr r r zs ng rrng zs ng r r o i f g fi f g fi f g = + ? ? ? ? ? ? + ++ ? ? ? ? ? ? = + + =+ ? ? ? ? ? ? ? ? ? ? ? ? ? 1 1 1 1 1 () () (14) this is written in a loop-gain analysis format where the errors arising from a non-infinite open-loop gain are shown in the denominator. if z(s) is infinite over all frequencies, the denomi- nator of equation 14 reduces to 1 and the ideal desired signal gain shown in the numerator is achieved. the fraction in the denominator of equation 14 determines the frequency re- sponse. equation 15 shows this as the loop-gain equation: zs rrng loop gain fi () + = (15) if 20log(r f + ng ? r i ) is drawn on top of the open-loop transimpedance plot, the difference between the two would be the loop gain at a given frequency. eventually, z (s) rolls off to equal the denominator of equation 15, at which point the loop gain has reduced to 1 (and the curves have intersected). this point of equality is where the amplifier closed-loop v o r g v i r i z (s) i err r f i err figure 11. current feedback transfer function analysis circuit. table ii. demonstration fixtures by package. ordering literature product package number number opa2677u so-8 dem-opa-so-2a sbou003 opa2677idda hsop-8 not available not available opa2677t so-16 not available not available opa2677irgv qfn-16 not available not available this demonstration fixture can be requested at the texas instruments web site (www.ti.com) through the opa2677 product folder. macromodels and applications support computer simulation of circuit performance using spice is often useful when analyzing the performance of analog circuits and systems. this is particularly true for video and rf amplifier circuits where parasitic capacitance and inductance can have a major effect on circuit performance. a spice model for the opa2677 is available through the ti web site (www.ti.com). this model does a good job of predicting small-signal ac and transient performance under a wide variety of operating conditions, but does not do as well in predicting the harmonic distortion or dg/dp characteristics. this model does not attempt to distinguish between the package types in small-signal ac performance, nor does it attempt to simulate channel-to-channel coupling. operating suggestions setting resistor values to optimize bandwidth a current-feedback op amp like the opa2677 can hold an almost constant bandwidth over signal gain settings with the proper adjustment of the external resistor values, which is shown in the typical characteristics; the small-signal band- width decreases only slightly with increasing gain. these curves also show that the feedback resistor is changed for each gain setting. the resistor values on the inverting side of the circuit for a current-feedback op amp can be treated as frequency response compensation elements, whereas their ratios set the signal gain. figure 11 shows the small-signal frequency response analysis circuit for the opa2677. the key elements of this current-feedback op amp model are: buffer gain from the noninverting input to the inverting input r i buffer output impedance i err feedback error current signal z (s) frequency dependent open-loop transimpedance gain from i err to v o
opa2677 19 sbos126i www.ti.com frequency response given by equation 14 starts to roll off, and is exactly analogous to the frequency at which the noise gain equals the open-loop voltage gain for a voltage-feedback op amp. the difference here is that the total impedance in the denominator of equation 15 may be controlled somewhat separately from the desired signal gain (or ng). the opa2677 is internally compensated to give a maximally flat frequency response for r f = 402 ? at ng = 4 on 6v supplies. evaluat- ing the denominator of equation 15 (which is the feedback transimpedance) gives an optimal target of 490 ? . as the signal gain changes, the contribution of the ng ? r i term in the feedback transimpedance changes, but the total can be held constant by adjusting r f . equation 16 gives an approxi- mate equation for optimum r f over signal gain: r f = 490 C ng ? r i (16) as the desired signal gain increases, this equation eventually predicts a negative r f . a somewhat subjective limit to this adjustment can also be set by holding r g to a minimum value of 20 ? . lower values load both the buffer stage at the input and the output stage if r f gets too low actually decreasing the bandwidth. figure 12 shows the recommended r f versus ng for both 6v and a single +5v operation. the values for r f versus gain shown here are approximately equal to the values used to generate the typical characteristics. they differ in that the optimized values used in the typical char- acteristics are also correcting for board parasitic not consid- ered in the simplified analysis leading to equation 16. the values shown in figure 12 give a good starting point for designs where bandwidth optimization is desired. the total impedance going into the inverting input may be 1/2 opa2677 r f 392 ? v o v i r g 97.6 ? +6v C 6v 50 ? 50 ? load v o power-supply decoupling not shown. v i 50 ? source r m 102 ? r f r g = C = C 4 figure 13. inverting gain of C 4 with impedance matching. 600 500 400 300 200 noise gain 025 10 15 20 5 feedback resistor ( ? ) +5v 5v figure 12. feedback resistor vs. noise gain. is essential for power-supply ripple rejection, noninverting input noise current shunting, and to minimize the high- frequency value for r i in figure 11. inverting amplifier operation the opa2677 is a general-purpose, wideband current-feed- back op amp; most of the familiar op amp application circuits should be available to the designer. those dual op amp applications that require considerable flexibility in the feed- back element (for example, integrators, transimpedance, and some filters) should consider a unity-gain stable, voltage- feedback amplifier such as the opa2822, because the feed- back resistor is the compensation element for a current- feedback op amp. wideband inverting operation (and espe- cially summing) is particularly suited to the opa2677. figure 13 shows a typical inverting configuration where the i/o impedances and signal gain from figure 1 are retained in an inverting circuit configuration. in the inverting configuration, two key design considerations used to adjust the closed-loop signal bandwidth. inserting a series resistor between the inverting input and the summing junction increases the feedback impedance (denominator of equation 15), decreasing the bandwidth. the internal buffer output impedance for the opa2677 is slightly influenced by the source impedance looking out of the noninverting input terminal. high-source resistors have the effect of increasing r i , decreasing the bandwidth. for those single-supply appli- cations which develop a midpoint bias at the noninverting input through high-valued resistors, the decoupling capacitor must be noted. the first is that the gain resistor (r g ) becomes part of the signal source input impedance. if input impedance matching is desired (which is beneficial when- ever the signal is coupled through a cable, twisted pair, long pc board trace or other transmission line conductor), it is normally necessary to add an additional matching resistor to ground. r g , by itself, is not normally set to the required input impedance since its value, along with the desired gain, will determine an r f , which may be non-optimal from a fre- quency response standpoint. the total input impedance for the source becomes the parallel combination of r g and r m . the second major consideration, touched on in the previous paragraph, is that the signal source impedance becomes part of the noise gain equation and has a slight effect on the bandwidth through equation 15. the values shown in figure 12 have accounted for this by slightly decreasing r f (from the optimum values) to re-optimize the bandwidth for the noise gain of figure 12 (ng = 3.98). in the example of figure 13, the r m value combines in parallel with the external 50 ? source impedance, yielding an effective driving impedance of 50 ? || 102 ? = 33.5 ? . this impedance is added in series with r g for calculating the noise gain which gives ng = 3.98. this value, along with the inverting input impedance of 22 ? , are inserted into equation 16 to get a feedback
opa2677 20 sbos126i www.ti.com transimpedance nearly equal to the 402 ? optimum value. note that the noninverting input in this bipolar supply invert- ing application is connected directly to ground. it is often suggested that an additional resistor be connected to ground on the noninverting input to achieve bias current error can- cellation at the output. the input bias currents for a current- feedback op amp are not generally matched in either magni- tude or polarity. connecting a resistor to ground on the noninverting input of the opa2677 in the circuit of figure 13 actually provides additional gain for that input bias and noise currents, but does not decrease the output dc error since the input bias currents are not matched. output current and voltage the opa2677 provides output voltage and current capabili- ties that are unsurpassed in a low-cost dual monolithic op amp. under no-load conditions at 25 c, the output voltage typically swings closer than 1v to either supply rail; tested at +25 c swing limit is within 1.1v of either rail. into a 6 ? load (the minimum tested load), it delivers more than 380ma continuous and > 1.2a peak output current. the specifications described above, though familiar in the industry, consider voltage and current limits separately. in many applications, it is the voltage times current (or v-i product) that is more relevant to circuit operation. refer to the output voltage and current limitations plot in the typical characteristics. the x and y axes of this graph show the zero-voltage output current limit and the zero-current output voltage limit, respectively. the four quadrants give a more detailed view of the opa2677 output drive capabilities, noting that the graph is bounded by a safe operating area of 1w maximum internal power dissipation (in this case for 1 channel only). superimposing resistor load lines onto the plot shows that the opa2677 can drive 4v into 10 ? or 4.5v into 25 ? without exceeding the output capabilities or the 1w dissipation limit. a 100 ? load line (the standard test circuit load) shows the full 5.0v output swing capability, as shown in the electrical characteristics tables. the minimum specified output voltage and current over temperature are set by worst-case simulations at the cold temperature extreme. only at cold startup will the output current and voltage decrease to the numbers shown in the electrical characteristics tables. as the output transistors deliver power, the junction temperatures increases, decreasing the v be s (increasing the available output voltage swing), and increasing the current gains (increasing the available output current). in steady-state operation, the avail- able output voltage and current will always be greater than that shown in the over-temperature specifications, since the output stage junction temperatures will be higher than the minimum specified operating ambient. to maintain maximum output stage linearity, no output short-circuit protection is provided. this is normally not a problem because most applications include a series-matching resistor at the output that limits the internal power dissipation if the output side of this resistor is shorted to ground. however, shorting the output pin directly to the adjacent positive power-supply pin (8-pin package), will in most cases, destroy the amplifier. if additional short-circuit protection is required, consider using the equivalent opa2674 that includes output current limiting. alternatively, a small series resistor may be included in the supply lines. under heavy output loads this will reduce the available output voltage swing. a 5 ? series resistor in each power-supply lead will limit the internal power dissipation to less than 1w for an output short circuit while decreasing the available output voltage swing only 0.5v for up to 100ma desired load currents. always place the 0.1 f power-supply decoupling capacitors after these supply current limiting resistors directly on the supply pins. driving capacitive loads one of the most demanding and yet very common load conditions for an op amp is capacitive loading. often, the capacitive load is the input of an analog-to-digital (a/d) converter including additional external capacitance that may be recommended to improve the a/d converter linearity. a high-speed, high open-loop gain amplifier such as the opa2677 can be very susceptible to decreased stability and closed-loop response peaking when a capacitive load is placed directly on the output pin. when the amplifier open- loop output resistance is considered, this capacitive load introduces an additional pole in the signal path that can decrease the phase margin. several external solutions to this problem have been suggested. when the primary considerations are frequency response flat- ness, pulse response fidelity, and/or distortion, the simplest and most effective solution is to isolate the capacitive load from the feedback loop by inserting a series isolation resistor between the amplifier output and the capacitive load. this does not eliminate the pole from the loop response, but rather shifts it and adds a zero at a higher frequency. the additional zero acts to cancel the phase lag from the capacitive load pole, thus increasing the phase margin and improving stability. the typi- cal characteristics show the recommended r s vs capacitive load and the resulting frequency response at the load. parasitic capacitive loads greater than 2pf can begin to degrade the performance of the opa2677. long pc board traces, un- matched cables, and connections to multiple devices can easily cause this value to be exceeded. always consider this effect carefully, and add the recommended series resistor as close as possible to the opa2677 output pin (see the board layout guidelines section). distortion performance the opa2677 provides good distortion performance into a 100 ? load on 6v supplies. relative to alternative solutions, it provides exceptional performance into lighter loads and/or operation on a single +5v supply. generally, until the funda- mental signal reaches very high frequency or power levels, the 2nd-harmonic dominates the distortion with a negligible 3rd-harmonic component. focusing then on the 2nd-har- monic, increasing the load impedance improves distortion directly. remember that the total load includes the feedback network in the noninverting configuration (see figure 1), this is the sum of r f + r g , whereas in the inverting configu- ration it is just r f . also, providing an additional supply decoupling capacitor (0.01 f) between the supply pins (for bipolar operation) improves the 2nd-order distortion slightly (3db to 6db).
opa2677 21 sbos126i www.ti.com in most op amps, increasing the output voltage swing in- creases harmonic distortion directly. the typical character- istics show the 2nd-harmonic increasing at a little less than the expected 2x rate whereas the 3rd-harmonic increases at a little less than the expected 3x rate. where the test power doubles, the difference between it and the 2nd-harmonic decreases less than the expected 6db, whereas the differ- ence between it and the 3rd-harmonic decreases by less than the expected 12db. this also shows up in the 2-tone, 3rd-order intermodulation spurious (im3) response curves. the 3rd-order spurious levels are extremely low at low-output power levels. the output stage continues to hold them low even as the fundamental power reaches very high levels. as the typical characteristics show, the spurious intermodulation powers do not increase as predicted by a traditional intercept model. as the fundamental power level increases, the dy- namic range does not decrease significantly. for 2-tone centered at 20mhz, with 10dbm/tone into a matched 50 ? load (that is, 2v pp for each tone at the load, which requires 8v pp for the overall 2-tone envelope at the output pin), the typical characteristics show 63dbc difference between the test-tone power and the 3rd-order intermodulation spurious levels. this exceptional performance improves further when operating at lower frequencies. noise performance wideband current-feedback op amps generally have a higher output noise than comparable voltage-feedback op amps. the opa2677 offers an excellent balance between voltage and current noise terms to achieve low output noise. the inverting current noise (24pa/ hz ) is significantly lower than earlier solutions whereas the input voltage noise (2.0nv/ hz ) is lower than most unity-gain stable, wideband voltage- feedback op amps. this low input voltage noise is achieved at the price of higher noninverting input current noise (16pa/ hz ). as long as the ac source impedance looking out of the noninverting node is less than 100 ? , this current noise does not contribute significantly to the total output noise. the op amp input voltage noise and the two input current noise terms combine to give low output noise under a wide variety of operating conditions. figure 14 shows the op amp noise analysis model with all the noise terms included. in this model, all noise terms are taken to be noise voltage or current density terms in either nv/ hz or pa/ hz . r g r f r s e o 2 driver e rs e n i n i n 4 ktr s 4ktr f 4ktr f r f r s e rs e n i n i n 4 ktr s 4ktr g figure 15. differential op amp noise analysis model. the total output spot noise voltage can be computed as the square root of the sum of all squared output noise voltage contributors. equation 17 shows the general form for the output noise voltage using the terms shown in figure 13. (17) e e i r ktr i r ktr ng o ni bn ss bi f f =+? ( ) ++? ( ) + ? ? ? ? 2 2 2 44 dividing this expression by the noise gain (ng = (1 + r f /r g )) gives the equivalent input referred spot noise voltage at the noninverting input, as shown in equation 18. (18) e e i r ktr ir ng ktr ng nnibn ss bi f f =+? ( ) ++ ? ? ? ? ? ? ? + ? ? ? ? ? ? 2 2 2 4 4 evaluating these two equations for the opa2677 circuit and component values (see figure 1) gives a total output spot noise voltage of 13.5nv/ hz and a total equivalent input spot noise voltage of 3.3nv/ hz . this total input referred spot noise voltage is higher than the 2.0nv/ hz specification for the op amp voltage noise alone. this reflects the noise added to the output by the inverting current noise times the feedback resistor. if the feedback resistor is reduced in high-gain con- figurations (as suggested previously), the total input referred voltage noise given by equation 18 approaches just the 2.0nv/ hz of the op amp. for example, going to a gain of +10 using r f = 298 ? gives a total input referred noise of 2.3nv/ hz . differential noise performance as the opa2677 is used as a differential driver in xdsl applications, it is important to analyze the noise in such a configuration. figure 15 shows the op amp noise model for the differential configuration. figure 14. op amp noise analysis model. 4kt r g r g r f r s 1/2 opa2677 i bi e o i bn 4kt = 1.6e C 20j at 290 k e rs e ni 4 ktr s 4ktr f
opa2677 22 sbos126i www.ti.com as a reminder, the differential gain is expressed as: g r r d f g =+ ? 1 2 (19) the output noise can be expressed as shown below: (20) e g e i r ktr i r ktr g o dnn ss if f d =? ? +? ( ) + ? ? ? ? + ( ) + ( ) 24224 22 2 2 dividing this expression by the differential noise gain (g d = (1 + 2r f /r g )) gives the equivalent input referred spot noise voltage at the noninverting input, as shown in equation 21. (21) e e i r ktr ir g ktr g o nn ss if d f d =? +? ( ) + ? ? ? ? + ? ? ? ? ? ? + ? ? ? ? ? ? 2422 4 2 2 2 evaluating these equations for the opa2677 adsl circuit and component values of figure 6 gives a total output spot noise voltage of 31.8nv/ hz and a total equivalent input spot noise voltage of 3.6nv/ hz . in order to minimize the output noise due to the noninverting input bias current noise, it is recommended to keep the noninverting source impedance as low as possible. dc accuracy and offset control a current-feedback op amp such as the opa2677 provides exceptional bandwidth in high gains, giving fast pulse settling but only moderate dc accuracy. the electrical characteris- tics show an input offset voltage comparable to high-speed, voltage-feedback amplifiers; however, the two input bias currents are somewhat higher and are unmatched. while bias current cancellation techniques are very effective with most voltage-feedback op amps, they do not generally re- duce the output dc offset for wideband current-feedback op amps. because the two input bias currents are unrelated in both magnitude and polarity, matching the input source impedance to reduce error contribution to the output is ineffective. evaluating the configuration of figure 1, using worst-case +25 c input offset voltage and the two input bias currents, gives a worst-case output offset range equal to: v off = (ng ? v os(max) ) + (i bn ? r s /2 ? ng) (i bi ? r f ) where ng = noninverting signal gain = (4 ? 4.5mv) + (30 a ? 25 ? ? 4) (402 ? ? 30 a) = 18mv + 3mv 12.06mv v off = C 29.06mv to +35.06mv thermal analysis due to the high output power capability of the opa2677, heat- sinking or forced airflow may be required under extreme operating conditions. maximum desired junction temperature sets the maximum allowed internal power dissipation as de- scribed below. in no case should the maximum junction tem- perature be allowed to exceed 175 c. operating junction temperature (t j ) is given by t a + p d ? ja . the total internal power dissipation (p d ) is the sum of quiescent power (p dq ) and additional power dissipation in the output stage (p dl ) to deliver load power. quiescent power is the specified no-load supply current times the total supply voltage across the part. p dl depends on the required output signal and load, but for a grounded resistive load, p dl is at a maximum when the output is fixed at a voltage equal to 1/2 of either supply voltage (for equal bipolar supplies). under this condition, p dl = v s 2 /(4 ? r l ) where r l includes feedback network loading. note that it is the power in the output stage and not into the load that determines internal power dissipation. as a worst-case example, compute the maximum t j using an opa2677 so-8 in the circuit of figure 1 operating at the maximum specified ambient tempera- ture of +85 c with both outputs driving a grounded 20 ? load to +2.5v. p d = 12v ? 18ma + 2 ? [6 2 / (4 ? (20 ? || 534 ? ))] = 882mw maximum t j = +85 c + (0.83 ? 125 c/w) = 170 c this absolute worst-case condition exceeds specified maxi- mum junction temperature. this extreme case is not normally encountered. where high internal power dissipation is antici- pated, consider the thermal slug package version. board layout guidelines achieving optimum performance with a high-frequency am- plifier like the opa2677 requires careful attention to board layout parasitic and external component types. recommen- dations that optimize performance include: a) minimize parasitic capacitance to any ac ground for all of the signal i/o pins. parasitic capacitance on the output and inverting input pins can cause instability; on the noninverting input, it can react with the source impedance to cause unintentional band limiting. to reduce unwanted capaci- tance, a window around the signal i/o pins should be opened in all of the ground and power planes around those pins. otherwise, ground and power planes should be unbroken elsewhere on the board. b) minimize the distance (< 0.25") from the power-supply pins to high-frequency 0.1 f decoupling capacitors. at the device pins, the ground and power plane layout should not be in close proximity to the signal i/o pins. avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. the power-supply connections (on pins 4 and 7) should always be decoupled with these capacitors. an optional supply decoupling capaci- tor across the two power supplies (for bipolar operation) improves 2nd-harmonic distortion performance. larger (2.2 f to 6.8 f) decoupling capacitors, effective at lower frequency, should also be used on the main supply pins. these can be placed somewhat farther from the device and may be shared among several devices in the same area of the pcb. c) careful selection and placement of external compo- nents preserve the high-frequency performance of the opa2677. resistors should be a very low reactance type. surface-mount resistors work best and allow a tighter overall layout. metal film and carbon composition axially leaded resistors can also provide good high-frequency performance.
opa2677 23 sbos126i www.ti.com again, keep leads and pcb trace length as short as possible. never use wire-wound type resistors in a high-frequency application. although the output pin and inverting input pin are the most sensitive to parasitic capacitance, always posi- tion the feedback and series output resistor, if any, as close as possible to the output pin. other network components, such as noninverting input termination resistors, should also be placed close to the package. where double-side compo- nent mounting is allowed, place the feedback resistor directly under the package on the other side of the board between the output and inverting input pins. the frequency response is primarily determined by the feedback resistor value as described previously. increasing the value reduces the band- width, whereas decreasing it gives a more peaked frequency response. the 402 ? feedback resistor used in the typical characteristics at a gain of +4 on 6v supplies is a good starting point for design. note that a 511 ? feedback resistor, rather than a direct short, is recommended for the unity-gain follower application. a current-feedback op amp requires a feedback resistor even in the unity-gain follower configura- tion to control stability. d) connections to other wideband devices on the board may be made with short direct traces or through onboard transmission lines. for short connections, consider the trace and the input to the next device as a lumped capacitive load. relatively wide traces (50mils to 100mils) should be used, preferably with ground and power planes opened up around them. estimate the total capacitive load and set r s from the plot of recommended r s vs capacitive load. low parasitic capacitive loads (< 5pf) may not need an r s because the opa2677 is nominally compensated to operate with a 2pf parasitic load. if a long trace is required, and the 6db signal loss intrinsic to a doubly-terminated transmission line is acceptable, implement a matched impedance transmission line using microstrip or stripline techniques (consult an ecl design handbook for microstrip and stripline layout tech- niques). a 50 ? environment is normally not necessary on board; in fact, a higher impedance environment improves distortion (see the distortion versus load plots). with a characteristic board trace impedance defined based on board material and trace dimensions, a matching series resistor into the trace from the output of the opa2677 is used, as well as a terminating shunt resistor at the input of the destination device. remember also that the terminating impedance is the parallel combination of the shunt resistor and the input impedance of the destination device. this total effective impedance should be set to match the trace impedance. the high output voltage and current capa- bility of the opa2677 allows multiple destination devices to be handled as separate transmission lines, each with their own series and shunt terminations. if the 6db attenuation of a doubly-terminated transmission line is unacceptable, a long trace can be series-terminated at the source end only. figure 16. internal esd protection. treat the trace as a capacitive load in this case and set the series resistor value as shown in the plot of r s vs capacitive load. however, this does not preserve signal integrity as well as a doubly-terminated line. if the input impedance of the destination device is low, there is some signal attenuation due to the voltage divider formed by the series output into the terminating impedance. e) socketing a high-speed part like the opa2677 is not recommended. the additional lead length and pin-to-pin capacitance introduced by the socket can create an ex- tremely troublesome parasitic network, which can make it almost impossible to achieve a smooth, stable frequency response. best results are obtained by soldering the opa2677 directly onto the board. f) use the C v s plane to conduct heat out of the hsop-8 powerpad package (opa2677idda) or the qfn-16 (opa2677irgv). these packages attach the die directly to an exposed thermal pad on the bottom, which should be soldered to the board. this pad must be connected electrically to the same voltage plane as the most negative supply applied to the opa2677 (in figure 6, this would be ground), which must have a minimum area of 3.5" x 3.5" (88.9mm x 88.9mm) to produce the ja values in the electri- cal characteristics tables. input and esd protection the opa2677 is built using a very high-speed complemen- tary bipolar process. the internal junction breakdown volt- ages are relatively low for these very small geometry devices and are reflected in the absolute maximum ratings table. all device pins have limited esd protection using internal diodes to the power supplies, as shown in figure 16. these diodes provide moderate protection to input overdrive voltages above the supplies as well. the protection diodes can typically support 30ma continuous current. where higher currents are possible (for example, in systems with 15v supply parts driving into the opa2677), current-limiting se- ries resistors should be added into the two inputs. keep these resistor values as low as possible, since high values degrade both noise performance and frequency response. external pin +v s C v s internal circuitry
opa2677 24 sbos126i www.ti.com date revision page section description changed storage temperature range from ? 40 c to +125 c to ? 65 c to +125 c. 3 electrical characteristics added both channels; power supply section under conditions. 4 electrical characteristics added +5v and both channels; power supply section under conditions. revision history note: page numbers for previous revisions may differ from page numbers in the current version. h 3/08 7/08 i 2 abs max ratings
package option addendum www.ti.com 3-mar-2016 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples opa2677h obsolete hsop dtj 8 tbd call ti call ti -40 to 85 opa2677h/2k5 obsolete hsop dtj 8 tbd call ti call ti opa2677h/2k5g3 obsolete hsop dtj 8 tbd call ti call ti opa2677hg3 obsolete hsop dtj 8 tbd call ti call ti -40 to 85 opa2677idda active so powerpad dda 8 75 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 op2677 opa2677iddag4 active so powerpad dda 8 75 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 op2677 opa2677iddar active so powerpad dda 8 2500 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 op2677 opa2677iddarg4 active so powerpad dda 8 2500 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 op2677 opa2677irgvr active vqfn rgv 16 2500 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 opa 2677 opa2677irgvt active vqfn rgv 16 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 opa 2677 opa2677irgvtg4 active vqfn rgv 16 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 opa 2677 opa2677u active soic d 8 75 green (rohs & no sb/br) cu nipdau level-2-260c-1 year opa 2677u opa2677u/2k5 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 opa 2677u opa2677ug4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 opa 2677u (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined.
package option addendum www.ti.com 3-mar-2016 addendum-page 2 pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant opa2677iddar so power pad dda 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 opa2677irgvr vqfn rgv 16 2500 330.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 opa2677irgvt vqfn rgv 16 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 opa2677u/2k5 soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 package materials information www.ti.com 14-jul-2012 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) opa2677iddar so powerpad dda 8 2500 367.0 367.0 35.0 opa2677irgvr vqfn rgv 16 2500 367.0 367.0 35.0 opa2677irgvt vqfn rgv 16 250 210.0 185.0 35.0 opa2677u/2k5 soic d 8 2500 367.0 367.0 35.0 package materials information www.ti.com 14-jul-2012 pack materials-page 2

mechanical data mpds100 ? august 2001 1 post office box 655303 ? dallas, texas 75265 dtj (r-pdso-g8) plastic small?outline 4202635/a 08/01 ?a? 0.1968 (4,98) 0.189 (4,80) index area ?b? 0.1497 (3,80) 0.1574 (4,00) 0.244 (6,20) 0.2284 (5,80) 0.0532 (1,35) 0.0688 (1,75) 0.016 (0,41) 0.018 (0,46) 0.020 (0,51) 0.013 (0,33) 0.090 (2,29) 0.110 (2,79) 0.130 (3,30) 0.150 (3,81) 0.0098 (0,25) 0.0075 (0,20) 0.0196 (0,50) 0.0099 (0,25) 45 0 ?8 0.050 (1,27) 0.016 (0,41) heat sink bottom view ?c? plane seating plane 0.050 (1,27) base 0.004 (0,10) 14 5 8 f g d c 0.001 (0,03) 0.004 (0,10) b 0.010 (0,25) m m x ?0.015 (0,38) m z s a 0.010 (0,25) m c m b s notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. body length dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions and gate burrs shall not exceed 0.006 (0,15) per side. d. body width dimension does not include inter?lead flash or protrusions. inter?lead flash and protrusions shall not exceed 0.010 (0,25) per side. e. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the cross-hatched area. f. lead dimension is the length of terminal for soldering to a substrate. g. the lead width, as measured 0.014 (0,36) or greater above the seating plane, shall not exceed a maximum value of 0.024 (0,61). h. lead-to-lead coplanarity shall be less than 0.004 (0,10) from seating plane. i. falls within jedec ms-012-aa.

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